Coppr / Agentic EDA
● v0.1 — 2026
From prompt to manufacturable hardware
Coppr.
An AI hardware engineer that designs, verifies, and ships real circuit boards — from intent to Gerbers.
Hardware design,
rewritten as code.
The Output
Not a diagram. A board.
What comes out of the compiler is a real, manufacturable design — placed components, routed nets, a checked BOM, and Gerbers a fab can build from. This is the class of board Coppr targets first.
MCUESP32-S3
PowerUSB-C 5V → 3.3V
Layers4-layer, JLCPCB-assembled
Outline~50 × 40 mm
Drag to rotate
ESP32-S3
PMIC
What Coppr Is
From intent to Gerbers.
Describe what the board needs to do. Coppr composes it from verified modules and runs ERC, DRC, DFM, and SPICE checks on every change — then hands back a schematic, layout, BOM, and Gerbers ready for fab.
Agent-native
LLMs edit the IR, not the GUI. Every action is structured and verifiable.
Verifier-driven
ERC, DRC, DFM, SPICE, and BOM checks run on every change.
KiCad-compatible
Output integrates with the existing open hardware ecosystem.
The Workflow
From weeks to an afternoon.
Today
The traditional workflow.
01Read 200 pages of datasheets. Take notes.
02Sketch block diagram on whiteboard.
03Manually place every symbol in Altium/KiCad.
04Wire nets by hand. Re-check pinouts.
05Build BOM. Cross-check availability.
06Place footprints. Route traces manually.
07Run DRC. Fix violations. Repeat.
08Generate Gerbers. Hope it works.
With Coppr
The compiled workflow.
01Write intent — prompt or Coppr spec.
02Agent composes modules from verified blocks.
03Compiler generates schematic, PCB, BOM.
04Verification loop runs ERC, DRC, DFM, SPICE.
05You review the diff. Approve or revise.
06Export Gerbers. Order from JLCPCB.